1. Field of the Invention
This invention relates generally to a substrate having a reduced dielectric constant and, more particularly, to a substrate having a reduced dielectric constant for use in multichip modules in which the substrate includes a series of spaced apart ceramic layers defining lattice structures therebetween for trapping air.
2. Discussion of the Related Art
As is well understood, techniques for fabricating integrated circuits allows a very large number of integrated circuit chips to be arranged and interconnected on a single substrate. Such an arrangement is sometimes referred to as a multichip module (MCM). In most MCMs, the substrate includes several dielectric ceramic layers including deposited metal layers for supporting and connecting associated integrated circuit chips in which the entire assembly is configured within a ceramic or metal housing. In certain applications, the substrate makes up the floor of the housing. Ceramic is selected as the dielectric material in many reliability applications because of the ability of this type of material to provide a hermetic seal, and thus protect the integrated circuits.
Two well known processes of fabricating an MCM substrate of this type are referred to as low temperature cofired ceramic (LTCC) and high temperature cofired ceramic (HTCC), both of which begin as layers of green (or unfired) tape. In the substrate fabrication processes, green unfired ceramic layers are first provided in a rolled strip format. Depending on the requirements of a particular MCM being developed, the strips of ceramic are punched to form desirable recesses and vias to accommodate the integrated circuit chips themselves, as well as the interconnects between the chips and any other associated circuitry. Metal layers are deposited and patterned on the ceramic layers in order to provide necessary ground planes, power planes and interconnects between the chips. Once the holes in the ceramic layers and the metal layers are formed, the different layers are stacked relative to each other such that the holes and recesses are appropriately aligned. The number of ceramic layers and metal layers is determined by the specific application and the number of integrated circuit chips. The layers are then fired at either low temperature for the LTCC process or high temperature for the HTCC process to form a single substrate or integral package.
Ceramic has a relatively high dielectric constant. Because of this high dielectric constant, a significant increase in the capacitive loading of the interconnect nodes between the integrated circuit chips in an MCM occurs, especially since several layers of ceramic are present. Capacitive loading degrades frequency performance and increases power dissipation in the MCM. Additionally, a higher dielectric constant lowers the attainable characteristic impedance for many microwave applications. In these microwave applications, a secondary effect of increasing series resistive losses occurs for the interconnects due to smaller conductive cross sections. Therefore, the use of ceramic substrates in multichip modules has been known to limit the performance of the device at frequencies above a few hundred megahertz. This problem may provide a significant drawback for certain applications such as in military and space electronics.
Low dielectric constant materials, such as certain glasses and Kevlars, used as substrates in these applications is a possible alternative. However, these materials are generally organic in nature, and as such provide certain inherent reliability problems which may significantly detract from the low dielectric advantages. Consequently, use of these materials may not be desirable.
What is needed is a substrate which provides low capacitance for interconnected paths between integrated circuit chips in a multichip module, provides a hermetic seal for the integrated circuits, and provides good stability and reliability in the multichip module. It is therefore an object of the present invention to provide such a material or structure.